In recent years, with the advancement of digital technologies, higher functionality of electronic hardware such as portable information devices and information appliances have been provided. Therefore, demands for an increase in a capacity of a nonvolatile memory element, reduction in a writing power in the memory element, reduction in write/readout time of the memory element, and longer life of the memory element have been increasing.
It is said that, in response to these demands, miniaturization of an existing flash memory using a floating gate has a limitation. Accordingly, a novel resistance variable nonvolatile memory element using a resistance variable layer as a component of a memory portion has recently attracted attention.
This resistance variable nonvolatile memory element has fundamentally a very simple structure in which a resistance variable layer 504 is sandwiched between a lower electrode 503 and an upper electrode 505 as shown in FIG. 32. The resistance varies to a high-resistance state or a low-resistance state by only applying a predetermined electric pulse between the upper and lower electrodes. And, these different resistance states are made to correspond to numerical values to perform storing of data. Because of such simplicities in structure and operation, the resistance variable nonvolatile memory element is expected to attain further miniaturization and cost reduction. Furthermore, since there are some cases where the state transition between the high resistance and the low resistance occurs in order of 100 ns or less, the resistance variable nonvolatile memory element has attracted attention from the viewpoint of a high-speed operation, and therefore a variety of proposals thereof have been made.
For example, as disclosed in Patent Document 1, there is a resistance variable nonvolatile memory element in which metal ions are taken in and out of the resistance variable layer 504 by application of a voltage to the upper electrode and to the lower electrode, to produce a high-resistance state and a low-resistance state, to thereby store data. Further, as disclosed in Patent Document 2, a resistance variable memory (phase change memory) which changes a crystalline state of a resistance variable layer with an electric pulse to change the resistance state has also been known.
In addition to the above, there have been many proposals relating to a resistance variable nonvolatile memory element using a metal oxide for the resistance variable layer 504.
The resistance variable memory element using a metal oxide is roughly classified into two types depending on the material used for the resistance variable layer. One is a resistance variable nonvolatile memory element using, as a resistance variable layer, a perovskite material (Pr(1-x)CaXMnO3 (PCMO), LaSrMnO3 (LSMO), GdBaCoxOy (GBCO)) which is disclosed in Patent Document 3 etc.
The other is a resistance variable nonvolatile memory element using a binary transition metal oxide. Since the binary transition metal oxide is very simple in composition and structure as compared to the above identified perovskite material, composition control therefor and film formation using them during manufacturing are relatively easy. In addition, the binary transition metal oxide has an advantage that its compatibility with a semiconductor manufacturing process is relatively favorable. Therefore, the binary transition metal oxide has been intensely studied in recent years. For example, Patent Document 4 and Non-patent Document 1 disclose NiO, V2O5, ZnO, Nb2O5, TiO2, WO3, and CoO as resistance variable materials. Further, Patent Document 5 discloses a resistance variable nonvolatile memory element using, as a variable-resistance material, a suboxide (oxide deviating from stoichiometric composition) of Ni, Ti, Hf, Nb, Zn, W, or Co, etc. Further, Patent Document 6 and Non-patent Document 2 disclose examples where a structure obtained by oxidizing the surface of TiN to form a TiO2 crystalline film in nm order is used for the resistance variable layer.
In addition to the above, Patent Document 7 discloses a so-called one time programmable memory which uses titanium oxide and tantalum oxide (Ta2O5) as resistance variable materials and is capable of writing only once.
Patent Document 1: Japanese Laid-Open Patent Application Publication No. 2006-40946
Patent Document 2: Japanese Laid-Open Patent Application Publication No. 2004-349689
Patent Document 3: U.S. Pat. No. 6,473,332
Patent Document 4: Japanese Laid-Open Patent Application Publication No. 2004-363604
Patent Document 5: Japanese Laid-Open Patent Application Publication No. 2005-317976
Patent Document 6: Japanese Laid-Open Patent Application Publication No. 2007-180202
Patent Document 7: Japanese Laid-Open Patent Application Publication No. Hei. 7-263647
Non-patent Document 1: I. G. Beak et al., Tech. Digest IEDM 2004, p587
Non-patent Document 2: Japanese Journal of Applied Physics Vol. 45, No. 11, 2006, pp. L3 10-L312